PCB Design Guidelines for EMI ...
上传用户:zhuanjifen
上传日期:2013-09-22
文件类型:PDF
文件大小:306.55K
资料积分:0分 积分不够怎么办?
CV02-04-PCB Design Guidelines for EMI & ESD SuppressionCITRUSCOM
CV02-04
ESD+EMI Filter Application Note
PCB Design Guidelines for EMI & ESD Suppression
PCB Placement
EMI & ESD Placement Considerations Good placement in PCB design is very important for suppression of EMI & ESD hazards. In general, ESD protection devices should be placed near the I/O connectors and the protected lines. The length of PCB metal traces connecting ESD devices, ICs and I/O connectors is a key factor for the ESD protection of protected IC on PCB. When a surge current of ESD strike comes, the path impedance determines how much current the path would shunt in case that the ESD protection devices and on-chip protection circuits have the same trigger voltage. A shorter trace length equates to smaller impedance, which ensures most the surge energy should be dissipated b
CV02-04
ESD+EMI Filter Application Note
PCB Design Guidelines for EMI & ESD Suppression
PCB Placement
EMI & ESD Placement Considerations Good placement in PCB design is very important for suppression of EMI & ESD hazards. In general, ESD protection devices should be placed near the I/O connectors and the protected lines. The length of PCB metal traces connecting ESD devices, ICs and I/O connectors is a key factor for the ESD protection of protected IC on PCB. When a surge current of ESD strike comes, the path impedance determines how much current the path would shunt in case that the ESD protection devices and on-chip protection circuits have the same trigger voltage. A shorter trace length equates to smaller impedance, which ensures most the surge energy should be dissipated b
关键词: CV02-04-PCB Design Guidelines Suppression

加入微信
获取电子行业最新资讯
搜索微信公众号:EEPW
或用微信扫描左侧二维码